A phase interpolator circuit can be used to provide a set of clock signals that may each include a phase offset from the other clock signals in the set. This set of phase offset clock signals can be used to provide one or more clock signals having a clock edge with a desired relationship to another signal, typically a data signal. For example, in some applications data is communicated between two integrated circuits that do not share a common clock. A phase interpolator circuit can be used to provide multiple clocks to the receiving integrated circuit, one of which is selected as an internal clock for data sampling.
In another example, multiple clock signals may be automatically and successively switched to sweep the clock phases as they are provided to a circuit. This latter implementation can provide timing measurements with increased resolution for high speed circuit testing. In many cases, it is desired that the clock phase sweeping operation be substantially error-free.